* Giux-Lab CalcLab Demo Collection * Demo 01 - uA741 transistor-level discrete operational amplifier * Test: unity-gain follower, large-signal transient response * * Purpose: * - exercise a real transistor-level op-amp topology * - expose readable internal nodes to the waveform viewer * - test PULSE, transient analysis and .measure support * * The internal topology and component values are based on a published * educational transistor-level 741 circuit. Node names have been rewritten * for readability and the circuit has been flattened into this demo. * * SPDX-License-Identifier: GPL-3.0-or-later * GNU GPL v3 * ============================================================ * POWER SUPPLIES * ============================================================ VCCSUP VCC 0 15 VEESUP VEE 0 -15 * ============================================================ * INPUT / TEST CONFIGURATION * * Unity-gain voltage follower: * non-inverting input = PULSE source * inverting input = output * * 10 V step: -5 V -> +5 V * Repetition period: 4 ms * ============================================================ VIN UA741_INP 0 PULSE(-5 5 1m 100n 100n 2m 4m) * Direct unity-gain negative feedback RFB UA741_OUT UA741_INM 1m * Small external load RLOAD UA741_OUT 0 10k CLOAD UA741_OUT 0 100p * ============================================================ * uA741 - INPUT STAGE * ============================================================ * Differential/input transistors Q741_Q1 UA741_INPUT_SUM UA741_INP UA741_PAIR_L QNPN Q741_Q2 UA741_INPUT_SUM UA741_INM UA741_PAIR_R QNPN * PNP transistors coupled to the input pair Q741_Q3 UA741_STAGE1_L UA741_PNP_LOAD_BASE UA741_PAIR_L QPNP Q741_Q4 UA741_STAGE1_R UA741_PNP_LOAD_BASE UA741_PAIR_R QPNP * Lower active-load / sink transistors Q741_Q5 UA741_STAGE1_L UA741_INPUT_BIAS UA741_SINK_L QNPN Q741_Q6 UA741_STAGE1_R UA741_INPUT_BIAS UA741_SINK_R QNPN * Input-stage bias transistor Q741_Q7 VCC UA741_STAGE1_L UA741_INPUT_BIAS QNPN * PNP bias/current-mirror devices Q741_Q8 UA741_INPUT_SUM UA741_INPUT_SUM VCC QPNP Q741_Q9 UA741_PNP_LOAD_BASE UA741_INPUT_SUM VCC QPNP R741_R1 UA741_SINK_L VEE 1k R741_R2 UA741_SINK_R VEE 1k R741_R3 UA741_INPUT_BIAS VEE 50k * ============================================================ * uA741 - BIAS GENERATOR * ============================================================ Q741_Q10 UA741_PNP_LOAD_BASE UA741_BIAS_NPN UA741_BIAS_RNODE QNPN Q741_Q11 UA741_BIAS_NPN UA741_BIAS_NPN VEE QNPN Q741_Q12 UA741_BIAS_PNP UA741_BIAS_PNP VCC QPNP R741_R4 UA741_BIAS_RNODE VEE 5k R741_R5 UA741_BIAS_PNP UA741_BIAS_NPN 39k * ============================================================ * uA741 - SECOND / VOLTAGE-GAIN STAGE * ============================================================ * Split Q13 represented with the same model and relative areas Q741_Q13B UA741_VAS_OUT UA741_BIAS_PNP VCC QPNP 0.75 Q741_Q16 VCC UA741_STAGE1_R UA741_VAS_EMITTER QNPN Q741_Q17 UA741_VAS_OUT UA741_VAS_EMITTER UA741_VAS_RNODE QNPN R741_R8 UA741_VAS_RNODE VEE 100 R741_R9 UA741_VAS_EMITTER VEE 50k * Dominant-pole compensation capacitor C741_CC UA741_STAGE1_R UA741_VAS_OUT 30p * ============================================================ * uA741 - OUTPUT / BUFFER STAGE * ============================================================ Q741_Q13A UA741_DRIVER_TOP UA741_BIAS_PNP VCC QPNP 0.25 Q741_Q14 VCC UA741_DRIVER_TOP UA741_OUT_NPRE QNPN 3 Q741_Q18 UA741_DRIVER_TOP UA741_DRIVER_MID UA741_DRIVER_LOW QNPN Q741_Q19 UA741_DRIVER_TOP UA741_DRIVER_TOP UA741_DRIVER_MID QNPN Q741_Q20 VEE UA741_DRIVER_LOW UA741_OUT_PPRE QPNP 3 Q741_Q23 VEE UA741_VAS_OUT UA741_DRIVER_LOW QPNP R741_R6 UA741_OUT UA741_OUT_NPRE 27 R741_R7 UA741_OUT_PPRE UA741_OUT 27 R741_R10 UA741_DRIVER_MID UA741_DRIVER_LOW 40k * ============================================================ * uA741 - SHORT-CIRCUIT PROTECTION * ============================================================ Q741_Q15 UA741_DRIVER_TOP UA741_OUT_NPRE UA741_OUT QNPN Q741_Q21 UA741_LIMIT_BIAS UA741_OUT_PPRE UA741_OUT QPNP Q741_Q22 UA741_STAGE1_R UA741_LIMIT_BIAS VEE QNPN Q741_Q24 UA741_LIMIT_BIAS UA741_LIMIT_BIAS VEE QNPN R741_R11 UA741_LIMIT_BIAS VEE 50k * ============================================================ * TRANSISTOR MODELS * * Integrated-transistor style models used by the educational * transistor-level 741 circuit. * ============================================================ .model QNPN NPN ( + BF=200 BR=2.0 VAF=125 IS=10f TF=0.35n + RB=200 RC=200 RE=2 + CJE=1.0p VJE=0.70 MJE=0.33 + CJC=0.3p VJC=0.55 MJC=0.5 + CJS=3.0p VJS=0.52 MJS=0.5 + ) .model QPNP PNP ( + BF=50 BR=4.0 VAF=50 IS=10f TF=30n + RB=300 RC=100 RE=10 + CJE=0.3p VJE=0.55 MJE=0.5 + CJC=1.0p VJC=0.55 MJC=0.5 + CJS=3.0p VJS=0.52 MJS=0.5 + ) * ============================================================ * TRANSIENT ANALYSIS * * 0 -> 12 ms * requested output spacing: 1 us * maximum internal timestep: 5 us * ============================================================ .tran 1u 12m 0 5u * ============================================================ * MEASUREMENTS * * These are intentionally varied to exercise CalcLab's parser. * If a particular .measure form is rejected, keep it in the * feature/compatibility notebook and temporarily comment it out. * ============================================================ * Basic statistical measurements .measure TRAN VOUT_MAX MAX V(UA741_OUT) FROM=1m TO=12m .measure TRAN VOUT_MIN MIN V(UA741_OUT) FROM=1m TO=12m .measure TRAN VOUT_PP PP V(UA741_OUT) FROM=1m TO=12m .measure TRAN VOUT_AVG AVG V(UA741_OUT) FROM=1m TO=12m .measure TRAN VOUT_RMS RMS V(UA741_OUT) FROM=1m TO=12m * Point measurement .measure TRAN VOUT_AT_2M FIND V(UA741_OUT) AT=2m * Closed-loop tracking error .measure TRAN ERROR_MAX MAX V(UA741_INP,UA741_OUT) FROM=1.2m TO=11m .measure TRAN ERROR_RMS RMS V(UA741_INP,UA741_OUT) FROM=1.2m TO=11m * 10%-90% large-signal transition times for a -5 V / +5 V step .measure TRAN T_RISE_10_90 TRIG V(UA741_OUT) VAL=-4 RISE=1 TARG V(UA741_OUT) VAL=4 RISE=1 .measure TRAN T_FALL_90_10 TRIG V(UA741_OUT) VAL=4 FALL=1 TARG V(UA741_OUT) VAL=-4 FALL=1 * PARAM measurements: useful compatibility tests. * Results are in V/us because the transition spans 8 V. .measure TRAN SLEW_POS PARAM='8e-6/T_RISE_10_90' .measure TRAN SLEW_NEG PARAM='8e-6/T_FALL_90_10' * Supply-current measurements. * SPICE current sign is referenced into the voltage-source positive terminal. .measure TRAN ICC_AVG AVG I(VCCSUP) FROM=1m TO=12m .measure TRAN IEE_AVG AVG I(VEESUP) FROM=1m TO=12m * ============================================================ * RECOMMENDED WAVEFORM-VIEWER TRACES * * External: * UA741_INP * UA741_INM * UA741_OUT * * Input stage: * UA741_STAGE1_L * UA741_STAGE1_R * UA741_INPUT_BIAS * * Gain stage: * UA741_VAS_EMITTER * UA741_VAS_OUT * * Output stage: * UA741_DRIVER_TOP * UA741_DRIVER_MID * UA741_DRIVER_LOW * UA741_OUT_NPRE * UA741_OUT_PPRE * UA741_OUT * ============================================================ .end